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IEEE Defect and Adaptive Test Analysis Workshop
(DATA 2011)

September 22-23, 2011
Anaheim, CA, USA

http://data.tttc-events.org/

CALL FOR PARTICIPATION

Scope -- Workshop Registration -- Advance Program -- Committees

Scope

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New initiatives in getting more out of testing have opened up new avenues of research and development in the areas of extracting information about defects and IC behavior through the use of innovative analysis techniques. As the need for these novel processes is becoming more widely accepted in the industry, new questions about how these techniques should be executed and controlled  in production, the types and sizes of database requirements, and even the format of test data and storage itself are being reviewed and discussed. New issues such as the control and documentation of dynamic test changes in response to local test data, ensuring high quality levels without test escapes, and the practical and realistic limitations of these new ideas are for board/system are now being discussed by many people in the industry. Even the definition of what is “Adaptive testing” is still being reviewed and defined. Closing the knowledge gap about these issues, the process, new test techniques, database requirements, and how defect models are being used to adapt test flows will be the goals of this year’s DATA workshop.

The IEEE International Workshop on Defect & Adaptive Test Analysis (DATA 2011) is aimed at addressing the above issues. Paper presentations on these topics are expected to generate active discussion on the challenges that must be met to ensure high IC quality through the end of the decade.
Workshop Registration
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Workshop registration is available via the workshop’s website: http://data.tttc-events.org

Advance Program
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Thursday -- Friday

September 22, 2011 (Thursday)
 
4:00 PM - 5:00 PM OPENING SESSION
4:00 - 4:15

Opening Remarks
Sankaran Menon (Intel Corporation, USA), General Chair, DATA
Jeffrey Roehr (Texas Instruments, USA), Program Chair, DATA

4:15 - 5:00

Keynote
Srikanth Venkataraman (Intel Corporation, USA)

 
5:00 PM - 6:30 PM Session 2 - Adaptive Test: The European View
Session Chair: Al Crouch (Asset-Intertech, USA)
5:00 - 5:30

Online Bivariate Outlier Detection in Final Test Using Kernel Density Estimation
Harm Bossers, Johann Hurink and Gerard Smit (University of Twente, Netherlands)

5:30 - 6:00

Concurrent Test Method for Test Time Reduction in Production of Mobile Devices
Amir Owzar, E. Baykal, P. Felicio, R. Teng, G. Valchera, R. Becker (STEricsson,
Switzerland)

6:00 - 6:30

A Holistic Approach to use Manufacturing Test Data for the Learning of Yield, Design Issues and Improve Test Process Operational Performances
Davide Appello, Chris Portelli, Domenico Chindamo, Alex Chufarowsky and Marco Esposito (OptimalTest and STMicroelectronics)

 
7:00 PM - 9:00 PM WORKSHOP WELCOME RECEPTION
 
September 23, 2011 (Friday)
 
8:00 AM - 8:05 AM Opening Remarks
Sankaran Menon (Intel Corporation, USA), General Chair, DATA
Jeffrey Roehr (Texas Instruments, USA), Program Chair, DATA
 
8:00 AM - 9:30 AM Session 3 - ABCs of Adaptive Test
Session Chair: Sankaran Menon (Intel Corporation, USA)
8:05 - 9:00

What Engineers need to know to implement the ITRS roadmap for Adaptive Test
Jeffrey Roehr (Texas Instruments, USA)

9:00 - 9:30

ATPG and DFT for Adaptive Test: Can we plan ahead in the flow?
Arani Sinha (Advanced Micro Devices, USA)

 
9:30 AM - 10:30 AM Session 4 - Data Mining and Adaptive Test
Session Chair: Jeffrey Roehr (Texas Instruments, USA)
9:30 - 10:00

Debug and Data Mining (Invited talk)
Nikhil Dakwala (Broadcom, USA)
           

10:00 - 10:30

Adaptive Test Beyond the Component Level (Invited talk)
Mathias Kamm (Cisco, USA)

 
10:30 AM - 10:50 AM COFFEE BREAK
 
10:50 AM - 11:50 AM Session 5 - Noise and Reliability
Session Chair: Jennifer Dworak, (Southern Methodist University)
10:50 - 11:20

Novel Test Structures for Reliability and Noise Analysis (Invited talk)
Mohammad Tehranipoor (University of Connecticut)
(collaboration with Xiaoxiao Wang, LeRoy Winemberg, Freescale)

11:20 - 11:50

Analyzing the Impact of Power Supply Noise on Propagation Delay
Sushmita Kadiyala Rao, Chaitra Sathyanarayana, Ryan Robucci and Chintan Patel, (University of Maryland, Baltimore)
     

 
11:50 AM - 1:00 PM LUNCH
 
1:00 PM - 2:30 PM Session 6 - From Yield to Adaptive Test
Session Chair: Nisar Ahmed (Freescale, USA)
1:00 - 1:30

Yield/Area maximization of Logic Circuits: From Theorem to Implementation
Mohammad Mirza-Aghatabar, Melvin Breuer and Sandeep Gupta (University of Southern California, Los Angeles)

1:30 - 2:00

DACS: Data Aware Component Salvaging in Presence of Microprocessor Integer Functional Unit Delay Faults
Yue Gao and Melvin Breuer (University of Southern California, Los Angeles)

2:00 - 2:30

Adaptive Group Testing - a DUT Response Technique applied in Semiconductor Test
Gunther Karner and Ivica Rogina (OptimiSE GmbH, Karlsruhe)

 
2:30 PM - 4:00 PM Session 7: Panel Discussion - Calling 007: How Secure is Our Data?
Organizers:  Al Crouch (Asset-Intertech, USA)
Jennifer Dworak (Southern Methodist University, USA)
 
Committees
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Organizing Committee

General Chair
Sankaran M. Menon, Intel

Co-General Chair
Al Crouch, Asset-Intertech

Program Chair
Jeff Roehr, Texas Instruments

Co-Program Chair
Arani Sinha, AMD

Vice Program Chair
Nisar Ahmed, Freescale

Finance Chair
Sankaran M. Menon, Intel

Publicity Chair
Jennifer Dworak, SMU

Publication Chair
Chintan Patel, UMBC


Program Committee

Rob Aitken, ARM
Tom Bartenstein, Cadence
Nemat Bidokhti, Cisco
Ken Butler, TI
Krish Chakrabarty, Duke Univ.
Sreejit Chakravarty, LSI Logic
John Carulli, TI
Bruce Cory, Nvidia
Jennifer Dworak, Brown University
Patrick Girard, LIRRM
Sandeep Goel, TSMC
Rohit Kapur, Synopsys
Ajay Koche, Consultant
Mike Laisne, Qualcomm
Nilanjan Mukherjee, Mentor Graphics
Teresa McLaurin, ARM
Amit Nahar, TI
Suriyaprakash Natarajan, Intel  
Jay Orbon, Rudolph Technologies
John Potter, Asset-Intertech
Rajesh Raina, Freescale
Mani Soma, U Washington
Claude Thibeault, Ecole Tech
Li C. Wang, UCSB
Xiaoqing Wen, Kyushu Institute of Tech.
LeRoy Winemberg, Freescale
Qiang Xu, CUHK
Mahmut Yilmaz, Nvidia

Steering Committee

Sankaran Menon, Intel
Adit Singh, Auburn Univ.
M. Tehranipoor, U Connecticut
Hank Walker, Texas A&M
Hans Manhaeve, Q-Start Test
Jim Plusquellic, U. New Mexico

For more information, visit us on the web at: http://data.tttc-events.org/

The IEEE Defect and Adaptive Test Analysis Workshop (DATA 2011) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 1ST VICE CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

SECRETARY
Joan FIGUERAS
UPC Barcelona Tech - Spain
Tel. +
E-mail figueras@eel.upc.edu

ITC GENERAL CHAIR
Doug YOUNG
- USA
Tel. +1-602-617-0393
E-mail doug0037@aol.com

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc.- USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Athens
- Greece
Tel. +30-210-7275145
E-mail dgizop@di.uoa.gr

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Matteo SONZA REORDA
Politecnico di Torino - Italy
Tel.+39-011-564-7055
E-mail matteo.sonzareorda@polito.it

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it

 

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc.- USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 2ND VICE CHAIR
Chen-Huan CHIANG

Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chen-huan.chiang@alcatel-lucent.com

FINANCE
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

IEEE DESIGN & TEST EIC
Krish CHAKRABARTY
Duke University - USA
Tel. +1-
E-mail krish@ee.duke.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chen-huan.chiang@alcatel-lucent.com

TECHNICAL ACTIVITIES
Patrick GIRARD
LIRMM – France
Tel.+33 467 418 629
E-mail patrick.girard@lirmm.fr

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
Tel. +81 743 72 5221
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc.- USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com